Bit-serial arithmetic Transposed data Bit-Slice 3 Bit-Slice 2 Bit-Slice 1 Bit-Slice 0 C C C C Cycle 2 Why bit-serial? 20 A + B WL1 Row decoders 0 255 BL/BLB 255 Sum WL2 Carry y A y B B 3 2 1 0 S S S S Bit-serial arithmetic Transposed data Bit-Slice 3 Bit-Slice 2 Bit-Slice 1 Bit-Slice 0 C C C C Cycle 3 Why bit-serial? 21 A + B WL1.
(Redirected from Bit-serial)
In digital logic applications, bit-serial architectures send data one bit at a time, along a single wire, in contrast to bit-parallelword architectures, in which data values are sent all bits or a word at once along a group of wires.
Almost all digital computers before 1951, and most of the early massive parallel processing machines used a bit-serial architectureâthey were serial computers.
Bit-serial architectures were developed for digital signal processing in the 1960s through 1980s, including efficient structures for bit-serial multiplication and accumulation.[1]
Often N serial processors will take less FPGA area and have a higher total performance than a single N-bit parallel processor.
See also[edit]References[edit]Bit Serial Arithmetic Block Diagram
External links[edit]
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(Redirected from Serial Number Arithmetic)
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Many protocols and algorithms require the serialization or enumeration of related entities. For example, a communication protocol must know whether some packet comes 'before' or 'after' some other packet. The IETF (Internet Engineering Task Force) RFC1982 attempts to define 'Serial Number Arithmetic' for the purposes of manipulating and comparing these sequence numbers.
This task is rather more complex than it might first appear, because most algorithms use fixed size (binary) representations for sequence numbers. It is often important for the algorithm not to 'break down' when the numbers become so large that they are incremented one last time and 'wrap' around their maximum numeric ranges (go instantly from a large positive number to 0, or a large negative number). Unfortunately, some protocols choose to ignore these issues, and simply use very large integers for their counters, in the hope that the program will be replaced (or they will retire), before the problem occurs (see Y2K).
Many communication protocols apply serial number arithmetic to packet sequence numbers in their implementation of a sliding window protocol. Some versions of TCP use protection against wrapped sequence numbers (PAWS). PAWS applies the same serial number arithmetic to packet timestamps, using the timestamp as an extension of the high-order bits of the sequence number.[1]
Operations on sequence numbers[edit]Bit Serial Arithmetic Block Diagram
Only addition of a small positive integer to a sequence number, and comparison of two sequence numbers are discussed.Only unsigned binary implementations are discussed, with an arbitrary size in bits noted throughout the RFC (and below) as 'SERIAL_BITS'.
Addition[edit]
Adding an integer to a sequence number is simple unsigned integer addition, followed by unsigned Modulo operation to bring the result back into range (usually implicit in the unsigned addition, on most architectures.)
Addition of a value outside the range
is undefined. Basically, adding values beyond this range will cause the resultant sequence number to 'wrap', and (often) result in a number that is considered 'less than' the original sequence number!
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Comparison[edit]
A means of comparing two sequence numbers i1 and i2 (the unsigned integer representations of sequence numbers s1 and s2) is presented.
Equality is defined as simple numeric equality.The algorithm presented for comparison is very complex, having to take into account whether the first sequence number is close to the 'end' of its range of values, and thus a smaller 'wrapped' number may actually be considered 'greater' than the first sequence number. Thus i1 is considered less than i2, only if:
Likewise, i1 is considered greater than i2, only if:
Shortfalls[edit]
The algorithms presented by the RFC have at least one significant shortcoming: there are sequence numbers for which comparison is undefined.Since many algorithms are implemented independently by multiple, independent cooperating parties,it is often impossible to prevent all such situations from occurring.
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The authors of RFC1982 simply punt:
Thus, it is often difficult or impossible to avoid all 'undefined' comparisons of sequence numbers.However, a relatively simple solution is available. By mapping the unsigned sequence numbers onto signed Two's complement arithmetic operations, every comparison of any sequence number is defined, and the comparison operation itself is dramatically simplified. All comparisons specified by the RFC retain their original truth values; only the formerly 'undefined' comparisons are affected.
General solution[edit]
The RFC1982 algorithm specifies that, for N-bit sequence numbers, there are 2(Nâ1)â1 values considered 'greater than', and 2(Nâ1)â1 considered 'less than'. Comparison against the remaining value (exactly 2Nâ1 distant) is deemed to be 'undefined'.
Most modern hardware implements signed Two's complement binary arithmetic operations.These operations are fully defined for the entire range of values for any operands they are givenâsince any N-bit binary number can contain 2N distinct values, and since one of them is taken up by the value 0, there are an odd number of spots left for all the non-zero positive and negative numbers.There is simply one more negative number representable than there are positive.For example, a 16-bit 2's complement value may contain numbers ranging from â32768 to +32767.
So, if we simply re-cast sequence numbers as 2's complement integers, and allow there to be one more sequence number considered 'less than' than there are sequence numbers considered 'greater than', we should be able to use simple signed arithmetic comparisons instead of the logically incomplete formula proposed by the RFC.
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Here are some examples (in 16 bits, again), comparing some random sequence numbers, against the sequence number with the value 0.
It is easy to see that the signed interpretation of the sequence numbers are in the correct order, so long as we 'rotate' the sequence number in question so that its 0 matches up with the sequence number we are comparing it against. It turns out that this is simply done, using an unsigned subtraction, and simply interpreting the result as a signed two's complement number. The result is the signed 'distance' between the two sequence numbers. Once again, if i1 and i2 are the unsigned binary representations of the sequence numbers s1 and s2, the distance from s1 to s2 is:
If distance is 0, the numbers are equal. If it is < 0, then s1 is 'less than' or 'before' s2.Simple, clean and efficient, and fully defined. However, not without surprises.
4 Bit Arithmetic Unit
All sequence number arithmetic must deal with 'wrapping' of sequence numbers; the number 2Nâ1 is equidistant in both directions, in RFC1982 sequence number terms. In our math, they are both considered to be 'less than' each other:
This is obviously true for any two sequence numbers with distance of 0x8000 between them.
Furthermore, implementing serial number arithmetic using two's complement arithmetic implies serial numbers of a bit-length matching the machine's integer sizes; usually 16-bit, 32-bit and 64-bit. Implementing 20-bit serial numbers needs shifts (assuming 32-bit ints):
See also[edit]Bit Serial Arithmetic Implementation Of Dsp ProcessorReferences[edit]
Arithmetic Bit ShiftExternal links[edit]
Bit Serial Arithmetic
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